1. Field of the Invention
The present invention relates to the field of integrated memory circuits. More particularly, the invention relates to integrated Random Access Memories (RAMs), for example static RAMs.
2. Discussion of the Related Art
Conventionally, a memory device such as a static RAM includes four main circuit blocks: a bidimensional array of readable and writable memory cells arranged in rows and columns, a row decoder circuit block for selecting the desired rows inside the array, a column decoder circuit block for selecting the desired columns of the array, and read/write circuits.
In general, the memory cell array includes n rows and m columns. Usually, an information word of p bits is stored in the memory cells belonging to a same row. When the memory device is operated in active mode (for reading or programming), the row decoder circuits select one row of the array (i.e., m memory cells are simultaneously selected) and the column decoder circuit selects the desired p columns among the m columns of the array; hence, m memory cells are selected but only a subset p of them is actually accessed.
In active mode, the current consumption of the memory array is therefore given by: EQU I.sub.ddr =m.times.C.sub.b .times..DELTA.V.sub.r
for the read operation, where .DELTA.V.sub.r is the voltage swing of the columns, and EQU I.sub.ddw =p.times.C.sub.b .times..DELTA.V.sub.w +(m-p).times.C.sub.b .times..DELTA.V.sub.r
for the write (programming) operation, where C.sub.b is the capacitance of each column, .DELTA.V.sub.w is the voltage swing of the p columns of the memory cells to be programmed, and .DELTA.V.sub.r is the voltage swing of the remaining unselected columns.
The most common approach to reduce the current consumption involves reducing the column capacitance C.sub.b.
Another approach which can be used, also in combination with the previous one, involves partitioning the memory cell array into multiple blocks that are selectively activated. In this way, the number m of cells connected to each row is reduced.
Still another technique provides for limiting the voltage swing .DELTA.V.sub.r by controlling the width of the time pulse during which a row is selected. This technique, however, is used only for the read operation.
In view of the state of the art described, it is an object of the present invention to provide a memory device having a low current consumption when it is accessed in write mode.